Faculty Development

Faculty Development

Techlabs training division has been successfully enabling innovative technology in engineering institutes through its training programmes for faculty members for more than a decade. With a motto to empower trainers who are sculpting the engineers of tomorrow, Techlabs’ Faculty Development Programs are strategically designed as workshops giving the educators an exposure to the latest advancements in different areas of technology driving the engineering industry. We cover niche technical domains like Embedded Systems, Virtual Instrumentation, VLSI technology amongst others. Keeping in view the professional commitments of educators, Techlabs provides alternatives for procurement of training such as In-House Training (at University/Institute campus) and Specialized Training (at Techlabs Bengaluru and Delhi offices).

  • ARM-based Embedded System Platforms
  • Architecture and Programming of Stellaris Microcontrollers
  • Intro to LM3WS8962 Evaluation Board
  • PWM Generation & OLED introduction
  • NVIC & interrupts
  • Systick Timer & SystickHandler
  • Robotics Experiments using  Stellaris  EVALBOT
  • Applications of Ethernet Connectivity Interface  & CAN in Stellaris

  • Intro to Hardware
  • Graphical System Design Concept
  • Working with loops & Case structure
  • Arrays, cluster & Type Definition Concept
  • Data Logging & Communication Protocol
  • Accessing Variables & Race Conditions

  • ASIC Design Flow
  • Semi-Custom & Full custom design
  • Logic, inverter, complex transmission gates & Delay Calculation
  • CMOS Fundamental & Circuit Design
  • Transistor sizing
  • Logic threshold-static behavior
  • Threshold & timing character
  • T. Sizing compound gates & timing path
  • Layout Design
  • CMOS Manufacturing Process
  • Fanout & Fanin
  • Stick diagram of CMOS devices & static Timing analysis

  • Develop FPGA designs
  • FPGA builds processes
  • GUI based coding & debugging along with simulation
  • RTL & Technology Schematics Viewing
  • Intelligent Simulation via support of ISIM/ModelSIM
  • Constraint  Generator, Timing  & Power  Analyzer
  • Package and Library Creations
  • Overview of Synthesis, Integration, Verification & Simulator Engines
  • Implementation of design, Translate, Map, Place & Route
  • Report user environment, FSM, missing constraints supported with Hands–On Demos

  • Simulation, Debugging and Verification
  • Module Level Simulation using various simulation engines
  • Trial and error engineering
  • Code Coverage Analysis
  • Assertion writing for ABV (Assertion Based Verification)
  • Log file Analysis
  • Area Timing, FSM, RTL, Technological constraints
  • User Environment Reporting
  • Overview of Synthesis, Integration, Verification & Simulator Engine


Techlabs Advantage
  • Hands on Experience with Latest Technology
  • Opportunity to learn from Industry Veterans
  • Interactive Training Sessions with Live Demos
  • Highly Sought-After Engineering Skills
  • Lucrative Job Prospects and Career Options
  • Expert Counselling and Focused Mentoring
  • State of the Art Techniques and Tools
  • Rich and Dynamic Multimedia Courseware
  • On-Site Training Programmes and Sessions